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2 changes: 1 addition & 1 deletion ports/atmel-samd/boards/hallowing_m0_express/board.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ uint8_t display_init_sequence[] = {
0xc3, 2, 0x8a, 0x2a,
0xc4, 2, 0x8a, 0xee,
0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V
0x2a, 0, // _INVOFF
0x20, 0, // _INVOFF
0x36, 1, 0x18, // _MADCTL bottom to top refresh
// 1 clk cycle nonoverlap, 2 cycle gate rise, 3 cycle osc equalie,
// fix on VTL
Expand Down
2 changes: 1 addition & 1 deletion ports/atmel-samd/boards/pewpew_lcd/board.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ uint8_t display_init_sequence[] = {
0xc3, 2, 0x8a, 0x2a,
0xc4, 2, 0x8a, 0xee,
0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V
0x2a, 0, // _INVOFF
0x20, 0, // _INVOFF
0x36, 1, 0xa0, // _MADCTL
// 1 clk cycle nonoverlap, 2 cycle gate rise, 3 cycle osc equalie,
// fix on VTL
Expand Down
2 changes: 1 addition & 1 deletion ports/atmel-samd/boards/pewpew_m4/board.c
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ uint8_t display_init_sequence[] = {
0xc3, 2, 0x8a, 0x2a,
0xc4, 2, 0x8a, 0xee,
0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V
0x2a, 0, // _INVOFF
0x20, 0, // _INVOFF
0x36, 1, 0xa0, // _MADCTL
// 1 clk cycle nonoverlap, 2 cycle gate rise, 3 cycle osc equalie,
// fix on VTL
Expand Down
2 changes: 1 addition & 1 deletion ports/atmel-samd/boards/pybadge/board.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ uint8_t display_init_sequence[] = {
0xc3, 2, 0x8a, 0x2a,
0xc4, 2, 0x8a, 0xee,
0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V
0x2a, 0, // _INVOFF
0x20, 0, // _INVOFF
0x36, 1, 0b10100000, // _MADCTL for rotation 0
// 1 clk cycle nonoverlap, 2 cycle gate rise, 3 cycle osc equalie,
// fix on VTL
Expand Down
2 changes: 1 addition & 1 deletion ports/atmel-samd/boards/pygamer/board.c
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ uint8_t display_init_sequence[] = {
0xc3, 2, 0x8a, 0x2a,
0xc4, 2, 0x8a, 0xee,
0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V
0x2a, 0, // _INVOFF
0x20, 0, // _INVOFF
0x36, 1, 0b10100000, // _MADCTL for rotation 0
// 1 clk cycle nonoverlap, 2 cycle gate rise, 3 cycle osc equalie,
// fix on VTL
Expand Down
2 changes: 1 addition & 1 deletion ports/atmel-samd/boards/ugame10/board.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ uint8_t display_init_sequence[] = {
0xc3, 2, 0x8a, 0x2a,
0xc4, 2, 0x8a, 0xee,
0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V
0x2a, 0, // _INVOFF
0x20, 0, // _INVOFF
0x36, 1, 0xa8, // _MADCTL bottom to top refresh
// 1 clk cycle nonoverlap, 2 cycle gate rise, 3 cycle osc equalie,
// fix on VTL
Expand Down
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