Enable T6030 external display support - #607
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Use the 32-bit size fields and return code in the 48-byte response header. Pass the full response buffer length and reject errors and oversized replies. Firmware 14.7 replies also carry the existing eight-byte EDID prefix. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Descend into tipd when its shared core is selected, including SPMI-only configurations. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Initialize optional fields and discard data left in a mode slot after a failed parse. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Dispatch get_tiling_state and set_tiling_state at callback indices 115 and 116. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
A zero completion result means timeout, not success. Return -ETIMEDOUT in that case. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Return management-message send failures and stop AFK initialization when starting its endpoint fails. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Set the receive FIFO enable bit on T6030 ASC mailboxes. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Start the debug endpoint and provide its requested shared buffers. Free them on reset and teardown. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Add separate AUX and HBR3 lane operations for T6030 using the existing hardware dispatch. Derive active lanes from mode and orientation, stopping before orientation changes. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Track HPD changes and notify the referenced DRM connector around Type-C mode updates. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Exclude T8122-compatible PHY endpoints from DCP component matching, as already done for T8103. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Poll between short completion waits to recover messages when interrupt delivery stalls. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Add an opt-in immediate acknowledgement path for syslog and IOReport messages. Reply before dispatching later messages, skipping normal processing of these log entries. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Delay initialization after endpoint startup and poll for its reply. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Return the read error instead of masking it as ENODEV. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Describe display controllers, DARTs, mailboxes and crossbars, including the DMA window and power settings. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Add the panel properties, framebuffer links and display aliases. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
Enable dcpext1 and route it through ATC0 to USB-C. Enable synchronous firmware acknowledgements and keep ATC0 powered. Signed-off-by: Ramzi Abdiche <abdicheramzi@gmail.com>
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| mbox-names = "mbox"; | ||
| iommus = <&dcp_dart 5 0x100 0x0 0x10 0x0>; | ||
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| reg-names = "coproc", "disp-0", "disp-1", "disp-2", "disp-3"; |
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does it work with 4? dcpep_cb_map_reg failed for me until i added a fifth
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Would it make sense if i took the dcp related dt changes and added them to my pr? |
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Please provide sign offs under your known identity (I see a real name on your GitHub so I don't think it's meant to be anonymous?) |
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| } | ||
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| static void atcphy_enable_dp_aux(struct apple_atcphy *atcphy) | ||
| static const struct atcphy_dp_link_rate_configuration dp_hbr3_config_t8122 = { |
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dp_rbr_config_t8122 = {
.freqinit_count_target = 0x21c,
.fbdivn_frac_den = 0,
.fbdivn_frac_num = 0,
.pclk_div_sel = 0x13,
.lfclk_ctrl = 5,
.vclk_op_divn = 1, // No AUSPLL_FD_VCLK_PRE_DIVN
};
dp_hbr_config_t8122 = {
.freqinit_count_target = 0x1c2,
.fbdivn_frac_den = 0x3FFE,
.fbdivn_frac_num = 0x1FFF,
.pclk_div_sel = 0x9,
.lfclk_ctrl = 5,
.vclk_op_divn = 1, // No AUSPLL_FD_VCLK_PRE_DIVN
};
dp_hbr2_config_t8122 = {
.freqinit_count_target = 0x1c2,
.fbdivn_frac_den = 0x3FFE,
.fbdivn_frac_num = 0x1FFF,
.pclk_div_sel = 0x4,
.lfclk_ctrl = 5,
.vclk_op_divn = 1,
};
So, most of it seems to match the t8103 values.
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removed the duplicate HBR3 configuration and reused the existing table
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But they do not fully match? the lfclk_ctrl seems to be different. Also, you are hardcoding hbr3, instead of the correct table for the link rate.
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So can we select dp_lr_config[lr] for the requested rate, giving lfclk_ctrl = 5 for RBR/HBR/HBR2 and 6 for HBR3, while handling the t8122-specific divider differences separately? Or does lfclk_ctrl also differ between generations for the same rate?
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you can just have a second table for the values that differ in t8122 next to the t8103 one
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| /* Do not enable this DP sequence on untested T8122-family SoCs. */ | ||
| static const struct atcphy_hw atcphy_hw_t6030 = { |
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Same sequence on t6031. Can't really test it, as i haven't gotten dcp working there yet, but the traces seem to match.
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I have kept this patch limited to t6030 for now, since thats what I have been able to test
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Don't worry and just send it for all of them.
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So should we enable these dp operations in the shared t8122 configuration, covering t8122, t6030 and t6031, and remove the t6030-only configuration?
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5 participants
Add T6030 DisplayPort PHY support and device-tree wiring, with DCP and RTKit fixes. USB-C display output and EDID retrieval are tested. HDMI output works with a forced mode; HDMI EDID parsing remains unresolved.