From 3908be75b127b618fe9d53ab4a38e3b6dd8669fc Mon Sep 17 00:00:00 2001 From: Cyril Chao Date: Thu, 28 May 2026 11:19:49 +0800 Subject: [PATCH 1/2] drivers: mediatek: use cache line size for AFE buffer alignment Replace the hard-coded 16-byte alignment with DCACHE_LINE_SIZE so the DMA buffer alignment follows the platform configuration. Signed-off-by: Cyril Chao --- src/drivers/mediatek/afe/afe-memif.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/drivers/mediatek/afe/afe-memif.c b/src/drivers/mediatek/afe/afe-memif.c index 9fb691622a92..54e5d90955be 100644 --- a/src/drivers/mediatek/afe/afe-memif.c +++ b/src/drivers/mediatek/afe/afe-memif.c @@ -437,7 +437,7 @@ static int memif_get_attribute(struct dma *dma, uint32_t type, uint32_t *value) *value = 4; break; case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT: - *value = 16; + *value = DCACHE_LINE_SIZE; break; case DMA_ATTR_BUFFER_PERIOD_COUNT: *value = 4; From ee61509670a262938636472448708a6c29d926ec Mon Sep 17 00:00:00 2001 From: Cyril Chao Date: Tue, 15 Sep 2026 20:40:58 +0800 Subject: [PATCH 2/2] mt8196: update ADSP system memory address Move the DRAM base from 0x90000000 to 0x92200000 and update the corresponding cached, non-cacheable and unused MPU regions. Signed-off-by: Cyril Chao --- src/platform/mt8196/include/platform/lib/memory.h | 2 +- src/platform/mt8196/platform.c | 7 +++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/src/platform/mt8196/include/platform/lib/memory.h b/src/platform/mt8196/include/platform/lib/memory.h index f6d8bd521208..c2debdbde0cb 100644 --- a/src/platform/mt8196/include/platform/lib/memory.h +++ b/src/platform/mt8196/include/platform/lib/memory.h @@ -24,7 +24,7 @@ #define VECTOR_SIZE 0x700 #define SRAM_START (SRAM_BASE + VECTOR_SIZE) -#define DRAM_BASE 0x90000000 +#define DRAM_BASE 0x92200000 #define DRAM0_SIZE 0x500000 #define MAILBOX_BASE (DRAM_BASE + DRAM0_SIZE) #define DSP_SYS_SIZE 0xA00000 diff --git a/src/platform/mt8196/platform.c b/src/platform/mt8196/platform.c index fc7cd9a7eb34..d4e93bf261e5 100644 --- a/src/platform/mt8196/platform.c +++ b/src/platform/mt8196/platform.c @@ -141,9 +141,9 @@ const struct xthal_MPU_entry __xt_mpu_init_table[] __section(".ResetVector.text" XTHAL_MPU_ENTRY(0x1a110000, 1, XTHAL_AR_RWXrwx, XTHAL_MEM_DEVICE), // audio XTHAL_MPU_ENTRY(0x4e100000, 1, XTHAL_AR_RWXrwx, XTHAL_MEM_WRITEBACK), // sram XTHAL_MPU_ENTRY(0x4e180000, 1, XTHAL_AR_NONE, XTHAL_MEM_DEVICE), // unused - XTHAL_MPU_ENTRY(0x90000000, 1, XTHAL_AR_RWXrwx, XTHAL_MEM_WRITEBACK), // dram - XTHAL_MPU_ENTRY(0x90500000, 1, XTHAL_AR_RWXrwx, XTHAL_MEM_NON_CACHEABLE), // dram - XTHAL_MPU_ENTRY(0x90900000, 1, XTHAL_AR_NONE, XTHAL_MEM_DEVICE), // unused + XTHAL_MPU_ENTRY(0x92200000, 1, XTHAL_AR_RWXrwx, XTHAL_MEM_WRITEBACK), // dram + XTHAL_MPU_ENTRY(0x92700000, 1, XTHAL_AR_RWXrwx, XTHAL_MEM_NON_CACHEABLE), // dram + XTHAL_MPU_ENTRY(0x92b00000, 1, XTHAL_AR_NONE, XTHAL_MEM_DEVICE), // unused }; const unsigned int __xt_mpu_init_table_size __section(".ResetVector.text") = @@ -214,4 +214,3 @@ void platform_wait_for_interrupt(int level) { arch_wait_for_interrupt(level); } -