From 10f853925a214f61af8b6fd337006185d1ff783a Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Tue, 8 Sep 2026 14:29:01 +0200 Subject: [PATCH] feat(c5): configure 48MHz clock source required for Nucleo-C562RE USB. Signed-off-by: Frederic Pillon --- .../C552R(C-E)Tx(J)_C562RETx(J)/variant_NUCLEO_C562RE.cpp | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/variants/STM32C5xx/C552R(C-E)Tx(J)_C562RETx(J)/variant_NUCLEO_C562RE.cpp b/variants/STM32C5xx/C552R(C-E)Tx(J)_C562RETx(J)/variant_NUCLEO_C562RE.cpp index f840e66dad..4f0fef041b 100644 --- a/variants/STM32C5xx/C552R(C-E)Tx(J)_C562RETx(J)/variant_NUCLEO_C562RE.cpp +++ b/variants/STM32C5xx/C552R(C-E)Tx(J)_C562RETx(J)/variant_NUCLEO_C562RE.cpp @@ -139,11 +139,6 @@ void SystemClock_Config(void) if (HAL_UpdateCoreClock() != HAL_OK) { Error_Handler(); } - - /* Peripherals using PCLK3 (36 MHz): - LPUART1 - */ - /* Peripherals using HSIDIV3 (48 MHz): USB */ @@ -151,6 +146,7 @@ void SystemClock_Config(void) Error_Handler(); } + HAL_RCC_CK48_SetKernelClkSource(HAL_RCC_CK48_CLK_SRC_HSIDIV3); } #ifdef __cplusplus